Job details
- Job Number: 26860546
- Austin, Texas, United States
- Posted: Aug. 26, 2013
- Weekly Hours: 40.00
Job Summary
In
this high-visibility position, you will also contribute to the
definition of sign-off requirements early in the project and work with
other teams to verify that EDA flows and tools are being set up and run
correctly during the project.
Key Qualifications
- Static Timing Analysis (STA)
- Power integrity analyses (IR, EM, IVD)
- Chip-level signal integrity
- Digital circuit design, verification and analysis
- Design For Test and Manufacturability (DFT/DFM)
- Post-silicon debug and bring-up
- Design Verification (DV)
- RTL design
- Standard Cell Library development
- Synthesis, Place and Route
- Digital clock distribution
- Have participated in multiple tapeouts of designs in 45nm and more advanced technology
- Be able to challenge the opinions of senior team members
- Be detail-oriented
- Have the ability to schedule work in spite of uncertainties
- Be able to analyze, organize and summarize large amounts of complex data
- Have good oral and written communication skills
Description
The Tapeout Signoff Engineer ensures that all necessary and appropriate
verification and analysis work has been performed on a complex digital
design prior to tapeout.
Education
BSEE/MSEE plus 7 years of experience in physical design is preferred
see https://jobs.apple.com/us/search?#&t=0&sb=req_open_dt&so=1&lo=0*USA&pN=6&openJobId=26860546
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