Title : Graduate Technical Intern to Intern Conversion (MS Level)

Graduate Technical Intern to Intern Conversion (MS Level) - 717875

Description

Job Description: Determines, specifies and evaluates the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly. Designs framework for particular functions. Defines, documents and tests processes for inclusion into technical platforms, sub-system specifications, input/output and working parameters for hardware and/or software compatibility. Identifies, analyzes and resolves sub-system and/or SoC design weaknesses. Influences the shaping of future products by significantly contributing to the architecture used across design families. Provides multi-layered technical expertise for next generation initiatives.

The ideal candidate should exhibit the following behavioral traits:
- Good verbal and written communication skills
- Self starter, excellent problem-solving skills and creativity
- Ability to work independently in a highly-dynamic team environment

Qualifications

This req is being created for intern to intern conversion.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:
- Must be pursuing an MS in Electrical Engineering, Computer Engineering, Computer Science or other science/engineering related field.
- Minimum of 3 months experience with programming and/or scripting languages (c/c++, perl, python, etc)
- Minimum of 3 months experience with VHDL or SystemVerilog
- Minimum of 3 months experience with RTL

Preferred Qualifications:
- Digital logic design
- CMOS design concepts
- ASIC and FPGA flows such as logic simulation, synthesis, mapping, partitioning, timing constraints and analysis, verification and validation. Experience with Synopsys, Cadence, Mentor Graphics EDA tools
- Logic design, functional validation, and performance analysis skills
- PC and SoC architecture, IO interfaces (processor cores, busses, caches, DDRs, interrupts, DMA, and PCIe, USB, MIPI CSI, MIPI DSI, I2C, eMMC, etc)
- UNIX, Linux, MS Window OS computing environment

Job Category: Engineering
Primary Location: USA-California, Santa Clara
Other Locations: USA-Field Sales, USA-Virtual, Americas
Full/Part Time: Part Time
Job Type: Student/Intern
Regular/Temporary: Temporary
Posting Date: Aug 27, 2013
Apply Before: Sep 27, 2013

Business Group
Employees in the Intel Architecture Group (IAG) deliver innovative platforms across computing and communication segments including data centers, mobile and desktop personal computers, handhelds, embedded devices and consumer electronics. Intel's industry leading technology is used to create integrated hardware and software solutions such as processors, chipsets, communication radios, graphics processors, motherboards, and networking components that deliver capabilities from security and manageability to computing performance and energy efficiency. IAG employees are at the forefront of enabling a new era of computing that is more integrated into all aspects of our daily lives.

Posting Statement: We will accept applications/resumes until 60 days after posting date or earlier at Intel’s discretion. Intel invites people of all ages currently enrolled in an academic institution (or graduated within the last 18 months) to apply.

Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto
Job Segments: Intern, Engineer, Embedded, Electrical, Computer Science, Entry Level, Engineering, Technology

see  http://jobs.intel.com/job/Santa-Clara-Graduate-Technical-Intern-to-Intern-Conversion-%28MS-Level%29-Job-CA-95050/5939900/